1. Field of the Invention
An object of the present invention is an electrical detector of binary logic levels. It can be applied in computer technology and, more especially, to memory cards fitted with micro-processors and MOS memory circuits of the non-volatile type (EPROMS or EEPROMS). The invention also concerns read amplifiers for data contained in random-access static or dynamic type electronic memories.
2. Description of the Prior Art
The use of memory cards is undergoing major growth. The most extensive use here relates to banking where memory cards with incorporated integrated circuits will ultimately replace cheque books and become a universal means of economic transaction. Whatever the financial operations performed with a card of this type, this card should contain two types of information. A first type of information concerns bank balances. This information gives an account of the balance before and after each operation. This information on a bank balance should be accessible to the user. It is confidential and yet, at the same time, needs to be known. Other information, on the contrary, should remain secret. Some information should be kept secret to all except the holder of the card: in this case it is his secret code which validates an operation performed with this card. Other information should remain secret to everybody including the holder of the card: in general, this is information used to prepare the secret code which is known only to the holder and therefore cannot be reconstituted by electrical manipulation of the card. Unfortunately, the imagination of fraudulent persons knows no bounds and preventive measures have to be taken against all attempts to decipher secret information contained in cards.
Thus, it has been realized that an informed fraudulent person might try to measure the electrical consumption of a biasing circuit of the system for reading information contained in a card so that, by measuring the variation in electrical consumption, he can determine the form of the logic levels put through by the card thereby deducing the secret codes registered therein. For the memory points of integrated circuit memory cards are often of the type having a transistor with two gates: one control gate and one floating gate. Charges trapped in the floating gate may counter the turning on of the transistor in response to a command applied to the control gate and may thus reveal their presence while their absence would make the transistor conductive and would provoke, in a measuring circuit that is series connected with this transistor, a variation in the signal introduced into it. The programming of a memory of this type can therefore be done by trapping or not trapping charges of this type in the floating gates of these transistors. However, from one situation to another, the electrical power thus used is low. And the information must be amplified so that it can be transmitted properly up to a reading unit or up to a unit for executing a financial transaction.
In practice, these amplifiers are made in a simple way using CMOS technology with two transistors of reverse conductivity, namely one P-type transistor and one N-type transistor, series connected and biased between the supply voltage Vcc of the circuit and the ground. The gates of these transistors are connected together and receive the signal, to be amplified. The output is taken at the midpoint of these transistors. This amplifier assembly is an inverting one. The disadvantage of an inverter of this type, used as an amplifier, is that it has a major difference in consumption depending on whether it has to transmit a logic "1" state or a logic "0" state. And the current that flows through this amplifier thus reveals the logic state read by its value. For, when it consumes more current, the internal impedance of the biasing generator causes a drop in the supply voltage which can be used in this direction. Regardless of the improvements made in these generators, since the connection circuits of this supply to the cards are circuits with contacts, hence necessarily resistive circuits, they play the role of an internal resistor of this type and cause a drop in the revealing voltage.
Furthermore, in dynamic type memory circuits, the logic level information to be detected is transient. A given logic level may be detected all the more efficiently as as this transient information is converted into information that is maintained for at least a certain period of time. Furthermore, when it is not doing its detection, a detector of this type must display the lowest possible static consumption. For it is necessary not to excessively raise the temperature of the integrated cicuit of which this detector may form a part. Finally, the detector thus made has to be a fast detector: it must have an operating speed which is as high as that of a logic gate.
An object of the invention is to provide a solution to these problems by proposing a detector essentially provided with two detecting circuits, which are parallel connected between the electrical power supply and the ground and are complementary with each other. Depending on the logic level introduced, one of the two circuits flips over and gives rise to an electrical consumption equivalent to the electrical consumption caused by the other circuit when the latter flips over to a different binary logic level. Judiciously, to prevent untimely electrical consumption outside of detection periods, these two circuits are activated and then deactivated at the moment of reception of each detected logic level. The deactivation signal subsequent to the activation signal of the detector can even be used to reset the detector at zero and make it available for a following detecting operation.